1. Technical Field
Embodiments of the present disclosure relate to a clock control device, and more particularly to a technology for changing a rising or falling edge trigger.
2. Related Art
Digital Large Scale Integrated circuits (hereinafter referred to as LSIs) such as microprocessors have generally been highly integrated. Most constituent circuits of a digital LSI may include synchronous sequential circuits, each of which includes one or more flip-flops and a logic gate configured to perform a logic operation of data between the flip-flops.
An edge-triggered flip-flop may be used in the above sequential circuit. The edge-triggered flip-flop may update output signals by operating in the rising edge of a common clock signal.
Meanwhile, a semiconductor memory device such as a Dynamic Random Access Memory (DRAM) may include a memory array having a plurality of memory cells storing data therein.
Specifically, a synchronous DRAM (SDRAM) from among DRAMs may be synchronized with an external clock signal, such that the SDRAM may perform the read/write operations. Therefore, the SDRAM may synchronize data with an edge of a clock signal, and may perform read and write operations, resulting in an implementation of high-speed data transmissions.
In this case, assuming that SDRAM operates at the rising part of the clock voltage, this means that the SDRAM operates at the rising edge. Assuming that SDRAM operates at the falling part of the clock voltage, this means that the SDRAM operates at the falling edge.
However, a conventional clock control device may have difficulty in adjusting a delay of the clock signal. When delay adjusting is performed to minimize a skew of a clock signal, a conventional clock control device can perform the delay adjusting by trial and error so as to synchronize data with an input clock signal using a buffer configured to perform such delay adjusting. As a result, much time is taken to perform the delay adjusting by the conventional clock control device, resulting in reduction of product productivity.